Computers manage information using a combination of information storage methods. Data is stored in different types of memory at different positions in the system, and the time required to access that memory, referred to as “latency,” varies with the type of memory. Cache memory on the central processing unit chip provides the fastest CPU access to stored data, but the amount of data that can be stored on the CPU chip is limited. Primary system memory typically includes volatile memory devices that are separate chips, but that are connected to the system bus to provide relatively fast access. Secondary storage devices, such as hard disks and USB drives, can have much larger memory capacity, but because they are not on the system bus, it takes longer to read and write information to such devices.
Information is stored in hard disks essentially as magnetic dots on one or more the circular disks called “platters.” Under the CHS address system, the location of each dot is defined by an address comprising three numbers: a cylinder number, a head number, and a sector number. The head number refers to which read/write head reads the disk. Because each read/write head operates on one side of one platter, identifying the head identifies which platter surface the disk the data is stored on. The cylinder number defines which of the concentric rings making up the disk surface the information is stored on. The sector defines where along the ring the data is stored.
Traditional hard drives suffer from a number of disadvantages, such as relatively low mechanical reliability, susceptibility to damage from shock or impact, high energy consumption and heat generation, and relatively slow data access. For example, access times for magnetic disk storage systems are on the order of tens of milliseconds (10,000 microseconds). As a result of these disadvantages, solid-state drives (SSD) are increasingly used as a replacement for hard drive storage devices.
Because they have no moving parts, SSDs are less fragile than hard disks, use less power, and tend to have lower access time and latency. One popular type of SSD is commonly known as flash memory, named in part because a flash operation must be used to erase the content of an entire block of data before it can be re-written. Flash memory is non-volatile (data is not lost when power is disconnected) and the memory can be reprogrammed, read, and erased electronically. In addition, flash memory devices are relatively robust and resistant to damage when subjected to shock, physical impact, high altitude, and extremes of temperature.
Flash memory comprises a number of cells, each of which typically stores a single binary digit or bit of information. A typical flash memory or nonvolatile memory cell comprises a field effect transistor having an electrically isolated floating gate that controls electrical conduction between the source and drain regions of the memory cell. Data is represented by a charge stored on the floating gate, and the resulting conductivity observed between the source and drain regions.
The speed at which the write process works is limited in part by the memory control structure of the memory device, and in part by the amount of time needed to program a memory cell using the electron tunneling process. Writing to flash memory is described in greater detail in U.S. patent application Ser. No. 12/621,222 by Leland Szewerenko for “Solid State Memory System,” filed Nov. 18, 2009, which is assigned to the present assignee and incorporated herein by reference. The read speed is limited largely by the time needed to load the read address into the flash memory part, select and access a page of flash memory, and load data from the page into an on-chip buffer so that the desired data can be transferred out of the memory device into a processor, bus, or other electronic component.
A solid-state drive typically has a host interface (such as SATA) and one or more memory (typically Flash) interfaces. On older memory systems, including early magnetic hard drives and some prior art flash drives, data was transferred word-by-word directly from the memory controller to the host interface. On more modern systems, data transferred to the host computer is typically transferred from the non-volatile memory to some kind of buffer memory (usually SRAM or SDRAM) by a Direct Memory Access (DMA) engine. The intermediate transfer into a buffer memory is desirable for many reasons including:                It permits transfers from the host to occur at maximum link speed.        It permits data from the host to be validated before committing to storage.        The intermediate RAM data can be used as a cache to speed up read/write accesses.        On transfers to the host, data can be read from multiple flash interfaces, staged in the RAM, and transferred in order to the host.        
The problem with the typical data transfer into a buffer memory, however, is that it results in a lengthy latency period before the data is actually transferred to the host. NAND type flash memory, the type commonly used for mass storage, consists of a set of blocks that in turn consist of a set of pages. Although different sizes may be used, a typical block size would be 256 Kbytes with each block consisting of 64 pages of 4 Kbytes each. There are three basic operations to NAND flash memory: read page, program page, and erase block. The read page operation, given the chip number, the block number, and the page number returns the contents of the addressed page. The transfer from the flash memory page to the flash chip's internal buffer requires about 20 microseconds. Once the read operation has completed, the data within the internal buffer can be transferred a byte at a time across the flash interface to the flash controller. The flash controller will deposit this data into its internal buffer. Assuming, for example, that a 4K block of data is to be transferred to the host, the entire 4K block will then be copied to the RAM buffer, which may take up to 100 microseconds (or more, depending upon the clock rate of the bus between the flash part and the flash controller). Only then can the actual transfer to the host SATA port begin. As a result, the host will not begin to see any data from the flash memory for up to 120 microseconds.
Although this latency period is much better than what can be achieved using traditional hard drives, flash memory access is still far below the ideal transfer rate. The time it takes to access data of a flash drive can thus create a significant bottleneck in the overall performance of a computer system.
What is needed is a method and apparatus for transferring data from multiple flash memories that provides the advantages of using an intermediate transfer into a buffer memory while reducing the latency period before data transfer begins.